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I/O device testing method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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I/O switches and serializer for each parallel scan register

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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I2C test single chip

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IBIST test for synchronous lines at multiple frequencies

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC chip tester using compressed digital test data and a method f

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC functional and delay fault testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC input memory with dual data and dual control inputs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC multiplexer control circuitry for tap selection circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC tap/scan test port access with tap lock circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC test cell with memory output connected to input multiplexer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC test equipment, measurement method in the IC test equipment,

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC test software system for mapping logical functional test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC test system and storage medium for the same

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC tester having region in which various test conditions are...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC testing apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC testing methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC testing methods and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC with addressable test port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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IC with cache bit memory in series with scan segment

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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