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Validating test signal connections within an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Valuation of tester accuracy

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Variable clocked scan test circuitry and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Variable self-time scheme for write recovery by low speed...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Vector restoration using accelerated validation and refinement

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Verification of array built-in self-test (ABIST)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Verification of asynchronous boundary behavior

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Verification of event handling

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Verification of event handling

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Verification of redundant safety functions on a monolithic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Video error/distortion checker

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Virtual monitor debugging method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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VLCT programmation/read protocol

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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VLSI chip test power reduction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Voltage identifier sorting

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Voltage level shifter with testable cascode devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Voltage margin testing of bladed servers

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Voltage-glitch detection device and method for securing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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