Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2001-09-05
2004-10-19
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S738000
Reexamination Certificate
active
06807647
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an IC test system for testing whether or not characteristics of an IC satisfy the predetermined standard, and relates to a storage medium for the same.
2. Description of Related Art
In general, an IC (Integrated Circuit), an LSI (Large Scale Integrated circuit) and the like (hereinbelow, these will be described only as “an IC”) have some dispersion in characteristics by each product when they are mass-produced. Then, an IC test system has been utilized for testing whether or not characteristics of an IC satisfy the predetermined standard.
An example of construction of a former IC test system according to an earlier development is shown in FIG.
5
. In this drawing, the IC test system
100
comprises an input device
110
, an output device
120
, a management device
130
, a control device
180
and an IC tester
190
.
The input device
110
, such as a keyboard or a mouse, to which an operator inputs a microprogram for simulating an operation of the IC tester
190
which will be explained below, and a data for identifying a test pattern signal which is to be applied to an IC. The output device
120
, such as a display or a printer, outputs the situation of simulation of the microprogram simulator
134
, or conditions or a result of an actual operation of the IC tester
190
. The IC tester
190
and the microprogram simulator
134
will be explained below.
The management device
130
outputs control signals to other elements of the IC test system
100
, and manages the whole of the IC test system
100
. The management device
130
comprises a management section
131
, an analysis section
132
, a storage area for storing hardware/register information
133
and a microprogram simulator
134
.
The management section
131
comprises a management program
131
a
, and manages data communication between the analysis section
132
and the control device
180
which will be explained below, in accordance with a process described in the management program
131
a.
The analysis section
132
comprises an application program
132
a
, and analyzes a test result obtained by operating the IC tester
190
which will be explained below, in accordance with the process described in the application program
132
a.
The microprogram simulator
134
simulates the operation of the IC tester
190
. The operation of the microprogram simulator
134
will be explained below. The hardware/register information
133
comprises information about simulation condition and a simulation result of the microprogram simulator
134
.
The control device
180
is connected to the management section
131
and the IC tester
190
. The control device
180
analyzes the control signal which is input by the management section
131
, according to the control program
181
, and controls the IC tester
190
in accordance with the analysis result.
The IC tester
190
actually tests characteristics of an IC under the control by the control device
180
. The IC tester
190
comprises a test pattern signal generator (which is not shown in the figures) which applies a predetermined test pattern signal for testing the electric characteristics of the IC, to the IC as a product.
The IC tester
190
comprises a storage area for storing hardware/register information
191
separate from the hardware/register information
133
. The hardware/register information
191
comprises information about a test condition and a test result of the IC tester
190
.
Then, the operation of the IC test system
100
will be explained. At first, when an operator inputs a data through the input device
110
, for identifying a test pattern signal to be applied to an IC, the analysis section
132
analyzes the data to output the analysis result to the management section
131
. When the management section
131
receives the analysis result, the management section
131
outputs the analysis result to the control device
180
.
The control device
180
executes the control program
181
. Further, the control device
180
processes the analysis result obtained by operating the analysis section
132
, and controls the IC tester
190
in accordance with the processed result. The IC tester
190
applies a test pattern signal to an IC in accordance with the control by the control device
180
, and outputs a test result, that is, a response from the IC, to the control device
180
.
The control device
180
outputs the test result obtained by operating the IC tester
190
to the management section
131
. When the management section
131
receives the test result, the management section
131
outputs the test result to the analysis section
132
. The analysis section
132
analyzes the test result and outputs an analysis result to the output device
120
. As described above, an actual test of an IC is carried out.
On the other hand, the microprogram simulator
134
simulates the operation of the IC tester
190
. The operation of the microprogram simulator
134
will be explained, in view of the flowchart shown in FIG.
6
. At first, the microprogram simulator
134
executes a translation process for translating a microprogram which is input through the input device
110
, into the executable program codes (step S
600
).
Then, the microprogram simulator
134
changes the contents of the hardware/register information
133
in accordance with the program codes formed by translating the microprogram (step S
601
). Here, when the contents of the hardware/register information
133
are changed by an operator through the input device
110
(step S
602
; YES), the process is back to the step S
600
, and the microprogram simulator
134
executes the translation process.
When the contents of the hardware/register information
133
are not changed (step S
602
; NO), the microprogram simulator
134
executes a simulation process (step S
603
). The microprogram simulator
134
simulates the operation of the IC tester
190
, and outputs the simulation result to the output device
120
.
As described above, the microprogram simulator
134
is not required to work with the analysis section
132
and the management section
131
. Therefore, the microprogram simulator
134
can operate separately. Moreover, an operator can confirm the operation of the IC tester
190
without actually using of the IC tester
190
, evaluate the microprogram which the operator programmed, and design a test pattern signal for being applied to an IC in accordance with the simulation result.
However, in this IC test system
100
according to an earlier development, because the management section
131
manages the hardware/register information
133
and the hardware/register information
191
separately, the simulation result of the microprogram simulator
134
cannot be analyzed by the analysis section
132
in real time. Further, the microprogram which is input for the simulation, cannot be reused as a microprogram for an actual test operated by the IC tester
190
immediately. Therefore, the working efficiency of an operator was deteriorated.
Moreover, the IC test system
100
, as a whole, requires many storage areas, because the IC test system
100
sets the hardware/register information
133
which is exclusively used by the microprogram simulator
134
, separate from the hardware/register information
191
of the IC tester
190
.
SUMMARY OF THE INVENTION
An object of the invention is to provide an IC test system which improves the working efficiency of an operator. Concretely, an object of this invention is to provide an IC test system which enables the simulation result to be analyzed by an analysis section in real time, and enables a microprogram which is input for setting the simulation condition, to be reused for setting the actual test condition, by making the microprogram simulator and the analysis section share the information about the simulation and the information about the test.
In accordance with the first aspect of the invention, an IC test system comprises:
a test pattern signal applying section for applyi
Ando Electric Co. Ltd.
Kerveros James C.
Lamarre Guy J.
Oliff & Berridg,e PLC
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