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(146,130) error correction code utilizing address information

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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(18, 9) Error correction code for double error correction...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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1000BASE-T packetized trellis coder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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1114.9 tap linking modules

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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1149.1 tap linking modules

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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2-dimensional interleaving apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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32-bit mode for a 64-bit ECC capable memory subsystem

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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64b/66b coding apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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8VSB DTV signals with PCCC and subsequent trellis coding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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ABIST address generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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ABIST data compression and serialization for memory built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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ABIST data compression and serialization for memory built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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ABIST-assisted detection of scan chain defects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Abnormality diagnosis system

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Abnormality monitor method and abnormality monitor system in a n

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Abnormality recovery system

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Absorb decode algorithm for 10GBase-T LDPC decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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AC ABIST diagnostic method, apparatus and program product

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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AC coupled line testing using boundary scan test methodology

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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