I/O switches and serializer for each parallel scan register

Details I/O switches and serializer for each parallel scan register I/O switches and serializer for each parallel scan register

2011-06-14

2011-06-14

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07962816

ABSTRACT:
An emulator for emulating operations of data processing circuitry normally connected to and cooperable with a peripheral circuit includes serial scanning circuitry connectable to the peripheral circuit. The serial scanning circuitry provides to and receives from the peripheral circuit signals which would normally be provided and received by the data processing circuitry. The serial scanning circuitry is connectable to an emulation controller for transferring serial data between the emulation controller and the emulator. The serial scanning circuitry includes a first state machine having plural states controlling the transfer of serial data. The emulator further includes control circuitry connected to the serial scanning circuitry and connectable to the emulation controller. The control circuitry, when connected to the emulation controller, effects the providing and receiving of signals and the transferring of serial data between the emulation controller and the emulator continuously without interruption while the first state machine remains in one state.

REFERENCES:
patent: 5390191 (1995-02-01), Shiono et al.
patent: 5404359 (1995-04-01), Gillenwater et al.
patent: 5459737 (1995-10-01), Andrews
patent: 5471481 (1995-11-01), Okumoto et al.

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