LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling,Digital logic testing

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Calibration method and apparatus for correcting pulse width...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Calibration system that can be utilized with a plurality of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Capturing and evaluating high speed data streams

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Centralized BIST engine for testing on-chip memory structures

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Centralized BIST engine for testing on-chip memory structures

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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CGROM testing device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Changing scan paths shifting by changing mode select input...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Characterizing jitter sensitivity of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Chip performance optimization with self programmed built in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Chip testing apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Chip testing system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for adding parametric test capability to...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for fuse disposing in a semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Circuit and method for increasing scan cell observability of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for integrated circuit configuration

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Circuit and method for performing built-in self test and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Circuit and method for testing a circuit having memory array...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for testing an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for testing an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Circuit and method for testing an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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