Bandwidth matching for scan architectures in an integrated...
BDX data in stable states
Bidirectional horizontal scan circuit with sub-sampling and...
Binary time-frame expansion of sequential systems
Bist architecture for detecting path-delay faults in a sequentia
BIST circuit for LSI memory
BIST memory test system
BIST scan path parts with test generator and compactor...
Bit synchronizers and methods of synchronizing and...
Bitstream assembler for comprehensive verification of...
Blockage aware zero skew clock routing method
Body bias using scan chains
Boundary scan apparatus and interconnect test method
Boundary scan apparatus and interconnect test method
Boundary scan apparatus and interconnect test method
Boundary scan cell and methods for integrating and operating...
Boundary scan cell design for high performance I/O cells
Boundary scan cell for testing AC coupled line using phase...
Boundary scan cells to improve testability of core-embedded...
Boundary scan chain routing