TAP and linking module for scan access of multiple cores...
TAP and shadow port operating on rising and falling TCK
Tap and test controller with separate enable inputs
Tap demultiplexer with select and select one outputs for HTML
TAP domain selection circuit with AUXI/O1 or TDI lead
TAP interface outputs connected to TAP interface inputs
TAP IR control with TAP/WSP or WSP DR control
TAP IR control with TAP/WSP or WSP DR control
Tap multiplexer
TAP sampling at double rate
Tap time division multiplexing
TAP with control circuitry connected to device address port
TAP with enable input gated and multiplexed mode select
TAP with select output from one of IR and DR
Tap with separate scan cell in series with instruction register
TAP, ST, lockout, and IR SO enable output data control
Target value search circuit, taget value search method, and...
Technique for combining scan test and memory built-in self test
Technique for combining scan test and memory built-in self test
Technique for debugging an integrated circuit having a...