Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1998-08-26
2000-09-19
Nguyen, Hoa T.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
G01R 3128
Patent
active
061227617
ABSTRACT:
Disclosed are a tester for testing an IC chip using test data consisting of many test vectors and a method for testing an IC chip using the tester. The tester has a pin memory, a sequencer memory, and a driving part. The pin memory stores many data blocks. Each of the test blocks is a combination of one or more test vector, and is repeated at least one time in the test data. The sequencer memory stores information about a designation order of the test blocks for restoring the test data. The driving part drives the pin memory so that the test blocks stored therein are output successively according to the designation order stored in the sequencer memory. The tester does not require an additional CPU, and the programming therefor is simple.
REFERENCES:
patent: 4860260 (1989-08-01), Saito et al.
patent: 4875210 (1989-10-01), Russo et al.
patent: 5606568 (1997-02-01), Sudweeks
patent: 5894484 (1999-04-01), Illes et al.
Nguyen Hoa T.
Samsung Electronics Co,. Ltd.
LandOfFree
IC chip tester using compressed digital test data and a method f does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with IC chip tester using compressed digital test data and a method f, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and IC chip tester using compressed digital test data and a method f will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1084398