Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1998-08-28
1999-10-12
Nguyen, Hoa T.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714744, G01R 3128
Patent
active
059648945
ABSTRACT:
An IC test equipment corrects the timing data for generating the strobe signal by each of the paths corresponding to a plurality of the devices under test measured in parallel and achieves an accurate measurement by each path, a measurement method in the IC test equipment, and a storage medium of the same. The IC test equipment is constructed as follows. The data generating circuit outputs the minimum value T1min of the timing data to the adding circuit. The data correction circuit outputs to the adding circuit the delay time TDLn with regard to the foregoing T1min corresponding to the device under test of the concerned number in accordance with the number data Dn inputted from the controller of the device under test. The adding circuit adds the foregoing T1min and the delay time TDLn to correct the timing data. Further, the clock generator generates the strobe signal on the basis of the corrected timing data inputted from the adding circuit to output to the register, and controls to latch inside the register circuit the voltage level data inputted to the register circuit from the judgment circuit when the strobe signal is generated.
REFERENCES:
patent: 4928278 (1990-05-01), Otsuji et al.
patent: 5646948 (1997-07-01), Kobayashi et al.
patent: 5682390 (1997-10-01), Housako et al.
Ando Electric Co. Ltd.
Nguyen Hoa T.
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