IC tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S745000, C714S815000, C714S721000

Reexamination Certificate

active

06182255

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an IC tester for testing a semiconductor integrated circuit, particularly relates to an IC tester which decides output values of devices under test and tests function and electric characteristics of the semiconductor integrated circuit.
2. Description of the Related Art
A variety of electronic devices have been recently quickly developed in an IC (Integrated Circuit). An IC, an LSI (Large Scale Integrated circuit), etc. realize the operations of respective elements such as a resistor, a capacitor, a transistor, by circuits which are formed by a printing method, evaporating method, etc. However, there occur slight variations in respective device characteristics between mass-produced devices. An IC tester tests whether the characteristics of the IC or LSI meet the standard or not.
In testing an IC by an IC tester, a pattern signal necessary for testing respective devices under test is inputted to given device pins of the device under test, and an output signal of the device under test relative to the pattern signal is decided by a decision circuit to decide the result of test. At that time, a comparator is connected to an output pin of the device under test as shown in FIG.
6
(A), wherein a reference voltage is compared with an output voltage of the device under test by the comparator, so that the output of the comparator is rendered high signal if the output voltage is higher than the reference voltage, and it is rendered a low signal if the output voltage is lower than the reference voltage as shown in FIG.
6
(B).
Further, as shown in
FIG. 7
, the decision circuit decides the result of test of the device under test by the conditions of output signals of the comparator at the timings of decision trigger signals respectively outputted from the timing generating circuit.
However, there are following problems in the conventional IC tester having the construction set forth above.
1. In the conventional comparator, since there is only one comparator relative to one output, and there is only one reference voltage, the comparison whether the voltage value of the output signal of each device under test is high signal or low signal is performed, so that the decision of the result of test by the decision circuit is performed in two manners, i.e., pass or failure of test of the device under test.
2. In the conventional decision circuit, only the decision of the result of test of each device under test has been conventionally performed only at one point along the time axis at the timings when the decision trigger signals are inputted, the decision of the condition of the device under test can not be performed in a period of time other than the aforementioned period of time.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to solve the aforementioned first problem for enabling the performance of a high impedance decision in addition to the decision of the result, i.e. pass or failure of test of the device under test, and also to solve the aforementioned second problem for enabling the performance of the decision of the conditions of output signals of the device under test in a period of time having a predetermined time interval between two decision trigger signals, thereby providing the IC tester capable of deciding the conditions of output signals of the device under test in a scope wider than that of the conventional IC tester.
To achieve the above object, the IC tester according to the first aspect of the invention for generating a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test so as to analyze conditions of output signals of the devices
3
under test relative to the test signal, thereby testing the devices
3
under test, is characterized in including comparator means that compares the output signals of the devices
3
under test with a plurality of given reference voltage values so as to decide a plurality of conditions of output signals of the devices
3
under test.
According to the first aspect of the invention, the IC tester generates a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test, wherein when analyzing conditions of output signals of the devices
3
under test relative to the test signal, the comparator means compares the output signals of the devices
3
under test with a plurality of given reference voltage values so as to decide a plurality of conditions of output signals of the devices
3
under test.
Accordingly, although the IC tester performs only the decision of the result of test of the devices under test, it is possible to decide the condition of the devices under test other than the result of test in accordance with the conditions of output signals of the devices under test by deciding a plurality of conditions of output signals of the devices under test by comparing the output signals with a plurality of reference voltages.
The IC tester
1
according to a second aspect of the invention for generating a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test so as to analyze conditions of output signals of the devices
3
under test relative to the test signal, thereby testing the devices
3
under test, is characterized in including decision means that fetches the output signals of the devices
3
under test in a predetermined period of time, and compares the output signals with logical value signals representing logical output signals of the devices
3
under test relative to the test signal so as to decide the conditions of output signals of the devices
3
under test are equal to logical value or not.
According to the second aspect of the invention, the IC tester generates a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test, wherein when analyzing conditions of output signals of the devices
3
under test relative to the test signal, the decision means fetches the output signals of the devices
3
under test in a predetermined period of time, and compares the output signals with logical value signals representing logical output signals of the devices
3
under test relative to the test signal so as to decide the conditions of output signals of the devices
3
under test are equal to logical value or not.
Accordingly, although the scope of decision is narrowed because only the decision of the result of test of each device
3
under test has been conventionally performed at one point along the time axis at the timings of the decision trigger signals, it is possible to perform a wide scope of decision because the output signal of each device
3
under test is fetched and decided continuously in a given period of time.
The IC tester
1
according to a third aspect of the invention for generating a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test so as to analyze conditions of output signals of the devices
3
under test relative to the test signal, thereby testing the devices
3
under test, is characterized in including comparator means that compares the output signals of the devices
3
under test with a plurality of given reference voltage values so as to decide a plurality of conditions of output signals of the devices
3
under test, and decision means that fetches the output signals of the devices
3
under test in a predetermined period of time, and compares the output signals with logical value signals representing logical output signals of the devices
3
under test relative to the test signal so as to decide the conditions of output signals of the devices
3
under test are equal to logical value or not.
According to the third aspect of the invention, the IC tester generates a test signal for testing devices
3
under test and outputting the test signal to the devices
3
under test, wherein when analyzing conditions of output signals of the devices
3
under te

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