Circuit arrangement and method of testing an application...
Circuit arrangement, electronic mechanism, electrical turn...
Circuit cell for test pattern generation and test pattern...
Circuit cell having a built-in self-test function, and test...
Circuit configuration with deactivatable scan path
Circuit for and method of determining the location of a...
Circuit for and method of determining the location of a...
Circuit for and method of implementing programmable logic...
Circuit for boosting encoding capabilities of test stimulus...
Circuit for checking a tristate detection circuit
Circuit for compression and storage of circuit diagnosis data
Circuit for control and observation of a scan chain
Circuit for controlling voltage fluctuation in integrated...
Circuit for easily testing a logic circuit having a number of in
Circuit for efficiently testing memory and shadow logic of a sem
Circuit for evaluating signal timing
Circuit for PLL-based at-speed scan testing
Circuit for PLL-based at-speed scan testing
Circuit for testing power down reset function of an...
Circuit for testing power down reset function of an...