Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-12-18
2007-12-18
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S742000, C714S003000, C714S006130, C714S025000, C716S030000, C326S039000
Reexamination Certificate
active
11208574
ABSTRACT:
A method of employing a plurality of integrated circuits in a multi-chip module is described. The method comprises steps of identifying a defective programmable logic device implemented on a first die; identifying a functional programmable logic device implemented on a second die; and coupling the defective programmable logic device and the functional programmable logic device. According to an alternate embodiment, a method of employing a plurality of integrated circuits in a multi-chip module comprises steps of configuring a plurality of programmable logic devices on a multi-chip module. A multi-chip integrated circuit package is also described.
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Bapat Shekhar
Cossoul Matthieu P. H.
King John J.
Trimmings John P
Xilinx , Inc.
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