Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-03-06
2008-11-11
Chung, Phung M (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S726000
Reexamination Certificate
active
07451373
ABSTRACT:
A compactor includes test data inputs that are connectable to circuit outputs of an electrical circuit, test comparison inputs, and test data outputs. The compactor further includes a number of H matrix XOR gates arranged as a switching mechanism between the test data inputs and the test data outputs such that data applied to the test data inputs is produced at the test data outputs compressed in accordance with coefficients of an H matrix of an error-correcting code, and compensation XOR gates arranged between the test data inputs and the test data outputs, each compensation XOR gate including an input for receiving a compensation value.
REFERENCES:
patent: 5809040 (1998-09-01), Dallmann et al.
patent: 6781398 (2004-08-01), Adler et al.
patent: 7185253 (2007-02-01), Mitra et al.
patent: 2005/0055613 (2005-03-01), Mitra et al.
patent: 2007/0088999 (2007-04-01), Chao et al.
patent: 10137745 (2002-03-01), None
C. Hora, et al., “An Effective Diagnosis Method to Support Yield Improvement”, Proc. ITC, pp. 260-269, 2002.
K. Barnhart, et al., “OPMISR: The Foundation for Compressed ATPG Vectors”, Proc. ITC, pp. 748-757, 2001.
S. Mitra, et al., “X-compact: An Efficient Response Compaction for Test Cost Reduction”, Proc. ITC, pp. 311-320, 2002.
J. Rajski, et al., “Convolution compaction of test responses”, Proc. ITC, pp. 745-754, 2003.
Kundu, S. Sogomonyan, et al., “Self-Checking Comparator with One Periodic Out-put”, IEEE Trans. Comp. vol. 45, No. 3 pp. 379-380, 1996.
Dmitriev, et al., “Robust Space Compaction of Test Responses”, Test Symposium, 2002 (ATS '02), Proceedings of the 11thAsian Nov. 18-20, 2002, Piscataway, NJ, USA, IEEE, Nov. 18, 2002, pp. 254-259, XP010628379, ISBN: 0-7695-1825-7.
Patel, et al., “Application of Saluja-Karpovsky compactors to test responses with many unknowns” VLSI Test Symposium, 2003, Proceedings, 21stApr. 27-May 1, 2003, Piscataway, NJ, USA, IEEE, Apr. 27, 2003, pp. 107-112, XP010638730, ISBN: 0-7695-1924-5.
Mitra, et al., “X-compact an efficient response compaction technique for test cost reduction” Proceedings international Test Conference 2002. ITC 2002, Baltimore, MD, Oct. 7-10, 2002, International Test Conference, New York, NY; IEEE, US, Oct. 7, 2002 (2002-10-047, pp. 311-320, XP010609755, ISBN: 0-7803-7542-4.
Beck Matthias
Goessel Michael
Muhmenthaler Peter
Poehl Frank
Rzeha Jan
Chung Phung M
Edell Shapiro & Finnan LLC
Infineon - Technologies AG
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