LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling,Digital logic testing

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Method and apparatus for test generation during circuit design

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for test generation during circuit design

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for test generation during circuit design

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a circuit module concurrently w

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Method and apparatus for testing a circuit using a die frame...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a computing device with...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Method and apparatus for testing a data processing system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a device in an electronic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a high speed data receiver...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a logic design of a programmabl

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Method and apparatus for testing a logic device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a ring of non-scan latches...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a system-on-a-chip

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing an embedded device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing an I/O buffer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing an IC device based on...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Method and apparatus for testing an integrated circuit using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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