Method and apparatus for testing a computing device with...

Details Method and apparatus for testing a computing device with... Method and apparatus for testing a computing device with...

2006-11-21

2006-11-21

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07139954

ABSTRACT:
An apparatus and a method for testing memory of a computing device, and more specifically to testing a Central Processing Unit (CPU), a system memory, and a combination thereof. The computing system includes one or more CPUs, a system memory, input and output devices. Among other features, the apparatus and method described herein can remove either a defective CPU or a defective portion of system memory from the computing device. An exemplary apparatus and method also reports to a computer user whether any CPU or system memory is defective as well as specifically identifying the defective computing component. The apparatus and method also detects a first defect related to a first corrupted portion of an instruction of a test program code and a second defect related to a second corrupted portion of the instruction.

REFERENCES:
patent: 5758056 (1998-05-01), Barr
patent: 6144930 (2000-11-01), Kinzelman
patent: 6463550 (2002-10-01), Cepulis et al.

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