Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2000-01-26
2003-03-11
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S765010
Reexamination Certificate
active
06532559
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to testing circuits, and more specifically, to testing circuits using groups of possibly bypassable tests.
RELATED ART
In the manufacturing of integrated circuits, testing is a required yet time consuming and expensive procedure. This is the case whether testing is performed at wafer level or after assembly. Adequate testing is required to ensure a reliable product. However, unnecessary additional testing increases both overall time to market and manufacturing cost. Current testing methods perform a large amount of unnecessary testing which increases both time to market and cost. Therefore, a need exists to reduce testing time and eliminate unnecessary tests in order to improve processing time and cost while continuously ensuring a reliable product.
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“An on-line data collection and analysis system for VLSI devices at wafer probe and final test” by Papadeas et al. Internationa Test Conference , 1994 Proceedings. pp. 771-780, Oct. 2-6, 1994.
Alaspa Ross A.
Hooper Paul J.
Marshall Casey
Miller Mark A.
Pham Chung V.
Britt Cynthia
Chiu Joanna G.
Clingan, Jr. James L.
De'cady Albert
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