Method and apparatus for testing a circuit using a die frame...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S039000

Reexamination Certificate

active

07089473

ABSTRACT:
A die frame logic analyzer unit. For one aspect, a programmable logic analyzer unit is provided, wherein at least a first portion of the programmable logic analyzer unit is provided in a die frame. The programmable logic analyzer unit is to test a function of an integrated circuit on a wafer that includes the die frame.

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Texas Instruments; IEEE Std 1149.1 (JTAG) Testability; 1997 Semiconductor Group; pp. 77.

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