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Apparatus and method for random pattern built in self-test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Apparatus and method for saving precise system state...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for self testing programmable logic arrays

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for storing trace information

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing and debugging an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing circuit units to be tested

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing high speed components using low

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing non-componented printed circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing on-chip ROM

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for testing using clocked test access...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for using a single bank of eFuses to...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method for verifying target circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and method of testing a semiconductor device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus and methods for assessing reliability of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Apparatus for detecting output bond integrity in a display...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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