Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-29
2005-03-29
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S735000
Reexamination Certificate
active
06874110
ABSTRACT:
A self-testing programmable logic array PLA system has an array of programmably interconnected logic cells, a built-in self-test (BIST) structure interconnected with the logic cells, and a BIST engine having an initiation input. The system is characterized in that, upon receiving the initiation input, the BIST engine drives the BIST structure to test connections and functions of the PLA. BIST systems are taught for stand-alone programmable logic arrays (PLAs) and for PLAs embedded in System-on-a-Chip (SoC) devices.
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Carr & Ferrell LLP
Stretch, Inc.
Tu Christine T.
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