Apparatus and method for self testing programmable logic arrays

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S735000

Reexamination Certificate

active

06874110

ABSTRACT:
A self-testing programmable logic array PLA system has an array of programmably interconnected logic cells, a built-in self-test (BIST) structure interconnected with the logic cells, and a BIST engine having an initiation input. The system is characterized in that, upon receiving the initiation input, the BIST engine drives the BIST structure to test connections and functions of the PLA. BIST systems are taught for stand-alone programmable logic arrays (PLAs) and for PLAs embedded in System-on-a-Chip (SoC) devices.

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M. Morris Mano, “computer System Architecture”, 2ndEdition, Prentice-Hall 1982, pp. 69-71.

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