Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1993-04-22
2001-09-25
Moise, Emmanuel L. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S522000, C324S527000, C324S701000
Reexamination Certificate
active
06295621
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to a system and method for detecting shorts, bridges or opens on integrated circuit output bonds, and in particular pertains to the sensing of bonding integrity of outputs of flat panel display driver circuits.
BACKGROUND OF THE INVENTION
Applications for flat panel displays (active matrix, passive matrix, EL, . . . ) are growing. For example, active matrix flat panel displays can provide advantages over conventional LCD's in the areas of viewing angle, response time and information content. Military and commercial applications such as cockpit displays, mapping displays and imaging systems can utilize these features of flat panel displays to create extremely accurate image reproductions.
A new generation of complex display driver integrated circuits are required to implement flat panel display systems. For instance, there is a need for “next generation” display driver IC's which can take full advantage of the capabilities of current and upcoming flat panel displays by providing extreme image accuracy. Such image accuracy is obtained at the expense of space. Space is a primary concern in applications using flat panel displays because the display driver IC's will have thousands of connections between the display driver IC outputs and the associated flat panel display due to the large number of display driver IC's.
Current system architectures for LCD display drivers for example, employ both row and column display driver IC's. These display driver IC's are high speed circuits having responsibility for accurate generation of large numbers of voltage levels used to drive flat panel displays. These display driver IC's need to be fast, handle large voltages, have a multitude of outputs, provide low offset error, contain tens of thousands of transistors, and yet minimize power. These conflicting design issues require careful analysis in the light of current IC technology.
In prior art flat panel display systems, verification of display driver IC output connectivity required an additional integrated circuit in the display system to sample the outputs of the display driver IC's to be tested, a test point or “bed-of-nails” approach that probed the display driver IC outputs and looked for the proper signal waveform, or a visual inspection of the flat panel display while a test pattern was being implemented. Such verification techniques are time consuming and prone to error.
The output connections for display driver IC's are extremely fine-pitch and are a significant manufacturing and test problem for flat panel display system manufacturers. The present invention provides a solution to this problem by allowing the display connections to the display driver IC's to be tested without human interaction or visual inspection, as previously required.
SUMMARY OF THE INVENTION
The present invention provides a display driver circuit including a bonding integrity detector for detecting whether an output of a display driver circuit is bonded properly in the final application. Typically, the invention will be embodied in the form of a display driver IC containing multiple individual display driver circuits. A bonding integrity detector is incorporated into each display driver circuit within the display driver IC and can detect output shorts, bridges, or opens, on all of the display driver IC outputs.
According to the preferred embodiment of the present invention, testing of a display driver IC output begins by first driving the display driver IC outputs being tested low. A test mode signal is then activated which disables the output driver circuit coupled to each output being tested and enables a test mode current source, also coupled to the output being tested. The current provided by the test mode current source causes the voltage at the output being tested to rise at a rate which varies as a function of the capacitive load of the output. The voltage at the output being tested is monitored by switching circuitry which compares the voltage at the output being tested to a switching threshold and switches from providing a logic zero signal to providing a logic one signal in response to voltage at the display driver output being tested reaching the switching threshold.
When a display driver IC in accordance with the present invention is used with flat panel displays, an unconnected display driver IC output will typically have a capacitive load of less than 5 picofarads, while a connected display driver IC output may have a load of 50 to 500 picofarads depending upon the size of the associated flat panel display.
The difference is capacitive load between an unconnected and a connected display driver IC output will cause a corresponding time difference in the switching points of the switching circuit. The output signal of the switching circuit is sampled between the two switching point times typical for connected and unconnected display driver IC outputs, and the logic signal from the switching circuit is latched and provided to a logic output line of the display driver IC. A connected display driver IC output will thus return a logic one, while an unconnected display driver IC output will return a logic zero, allowing for a determination of the bonding integrity of the tested display driver IC output.
A time window for sampling the logic signal from the switching circuit and determining whether or not the display driver IC outputs are not bonded properly depends on capacitive load on the output, the current supplied by the test mode current source, and the switching threshold voltage of the switching circuit. The inventive apparatus may also be responsive to two bits, located in a global control register, which allow four different current settings for the test mode to accommodate various display sizes and possible sampling intervals.
Display driver IC output shorts can be identified by driving alternating highs and lows on each display driver circuit IC output, disabling the associated output drivers as described above to permit a settling time, and then sampling the signals of the associated switching circuits as discussed above. This will isolate the short to a single output or two outputs, in the case of a bridging short.
REFERENCES:
patent: 4703483 (1987-10-01), Enomoto et al.
Erhart Richard Alexander
Nelson Richard Brian
Medtronic Inc
Moise Emmanuel L.
Wolde-Michael Girma
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