Test vector compression method
Test vector generating method and test vector generating...
Test vehicle data analysis
Test vehicle data analysis
Test wrapper including integrated scan chain for testing...
Test-facilitating circuit for information processing devices
Testability architecture for modularized integrated circuits
Testable circuit with a low number of leads
Testable design methodology for clock domain crossing
Testable IC having analog and digital circuits
Testable integrated circuit, integrated circuit...
Testable programmable gate array and associated LSSD/determinist
Testable transparent latch and method for testing logic...
Tester and method for testing LSI designed for scan method
Tester architecture construction data generating method,...
Tester arrangement comprising a connection module for testing, b
Tester channel count reduction using observe logic and...
Tester for testing semiconductor device
Tester system having a multi-purpose memory
Tester system having multiple instruction memories