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Post image techniques

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Post-mission test method for checking the integrity of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Power gating in integrated circuits for leakage reduction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Power reduction in scannable D-flip-flop with synchronous...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Pre-stored digital word generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Probeless testing of pad buffers on wafer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Probeless testing of pad buffers on wafer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Probeless testing of pad buffers on wafer

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Probing system for integrated circuit devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Process and circuit arrangement for monitoring the function of a

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Process of controlling plural test access ports

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Processor emulator transferring data with emulation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Processor to JTAG test access port interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Production interface for an integrated circuit test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Program analyzing apparatus which categorizes variables into dom

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Program debugging support device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Program patching of a ROM

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Program, test apparatus and testing method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Program-controlled unit and method for identifying and/or...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Programmable array built-in self test method and controller...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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