Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1998-02-24
2000-02-29
Teska, Kevin J.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714 37, G06F 1711
Patent
active
060319836
ABSTRACT:
A device for synthesizing a reverse model of a system includes a first store storing bits representative of transition functions of the system, a second store storing bits representative of an estimate of transition functions of the reverse model, and processing system. The processing system comprises a logical device for transforming the transition functions of the system into constraints on the reverse model, and a parameterization processor for applying a parameterization of the constraints to the estimate of transition functions of reverse system to form transition functions of the reverse model.
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Frejd Russell W.
Galanthay Theodore E.
Morris James H.
SGS-Thomson Microelectronics Limited
Teska Kevin J.
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