Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-08-14
2007-08-14
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000, C326S016000
Reexamination Certificate
active
10806539
ABSTRACT:
The peripheral circuitry (350, 360, ESD, BH) of an integrated circuit die on a wafer is tested without physically contacting the bond pads of the die.
REFERENCES:
patent: 6199182 (2001-03-01), Whetsel
Bassuk Lawrence J.
Brady W. James
Lamarre Guy
Radosevich Steven D.
Telecky , Jr. Frederick J.
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