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Testing system for evaluating integrated circuits, a burn-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Testing system for evaluating integrated circuits, a burn-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing system for evaluating integrated circuits, a testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing system for evaluating integrated circuits, a testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing system, testing system control method, and test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing the operation of integrated circuits by simulating a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing unit with testing information divided into redundancy-fr

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing using independently controllable voltage islands

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing with high speed pulse generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Through-core self-test with multiple loopbacks

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Tileable field-programmable gate array architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Time shift circuit for functional and AC parametric test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing adjustment circuit for semiconductor test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing control for input/output testability

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Timing control for input/output testability

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing edge forming circuit for IC test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Timing failure remedying apparatus for an integrated...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing fault diagnosis method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing generator and semiconductor testing apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Timing generator and semiconductor testing device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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