Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2003-02-20
2008-09-23
Tran, Minh-Loan T (Department: 2826)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C716S030000
Reexamination Certificate
active
07428675
ABSTRACT:
A voltage island architecture wherein the source voltage of each voltage island can be independently turned on/off or adjusted during a scan-based test. The architecture includes a plurality of voltage islands (102, 104), each powered by a respective island source voltage (VDDI1, VDDI2), and a testing circuit (116), coupled to the voltage islands, and powered by a global source voltage (Vg) that is always on during test, wherein each island source voltage may be independently controlled (106, 108) during test.
REFERENCES:
patent: 6664798 (2003-12-01), De Jong et al.
patent: 2002/0149263 (2002-10-01), Blanco et al.
patent: 480564 (2002-03-01), None
patent: 494632 (2002-07-01), None
Gattiker Anne E.
Nigh Phil
Oakland Steven F.
Pastel Leah M. P.
VanHorn Jody
Jaklitsch Lisa U.
Tran Minh-Loan T
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