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Technique for programming clocks in automatic test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique to decrease the exposure time of infrared imaging...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique to detect drive strength of input pin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique to test an integrated circuit using fewer pins

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for automatic eye-degradation testing of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for capturing signals at output pins in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for capturing signals at output pins in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for logic built-in self-test diagnostics of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for mitigating, detecting and correcting single...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for mitigating, detecting, and correcting single...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for mitigating, detecting, and correcting single...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for performing a Logic Built-In Self-Test in an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Temperature sampling in electronic devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Ternary search process

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access architecture and method of testing a module in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access circuit and method of accessing embedded test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access mechanism for supporting a configurable built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Test access port

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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