LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling,Digital logic testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable state machine of an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable test clock generation responsive to clock...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable test for memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable test pattern and capture mechanism for boundary...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable timing circuit for testing the cycle time of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable timing circuit for testing the cycle time of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable universal test interface and method for making the

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable universal test interface for testing memories with

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programmable voltage divider

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programming circuitry for configurable FPGA I/O

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Programming utility register to generate addresses in algorithmi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Progressive random access scan circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Propagation test strobe circuitry with boundary scan circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Propagation test strobe circuitry with boundary scan circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Protecting data on integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Providing high availability in a PCI-Express™ link in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Providing pseudo-randomized static values during LBIST...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Providing test vectors with pattern chaining definition

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Providing trusted access to a JTAG scan interface in a...