Programmable test clock generation responsive to clock...

Details Programmable test clock generation responsive to clock... Programmable test clock generation responsive to clock...

2008-01-13

2010-11-30

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S700000

Reexamination Certificate

active

07844875

ABSTRACT:
A clock signal within an application-specific integrated circuit (ASIC) is characterized while operating a subsystem. Subsequently, also on the ASIC, a testing clock signal is generated, based on the characterization of the operative clock signal, for purposes of testing the subsystem operating according to the testing clock signal instead of the clock signal. The ASIC includes a clock signal characterization circuit configured to characterize a clock signal within the ASIC; a programmable testing clock signal generator configured for being programmed based on said characterization of the clock signal, and for generating a test clock signal based on its said programming; and the subsystem tested when operating according to the testing clock signal instead of the clock signal.

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