Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-03-27
2010-06-01
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S712000
Reexamination Certificate
active
07730376
ABSTRACT:
A method, device, and system are disclosed. In one embodiment, the method comprises discovering a failure on a PCI Express interconnect, determining whether a failure override bit has been set to override the standard PCI Express Polling. Compliance state for the failure on the PCI Express interconnect, and if the failure override bit has been set, entering PCI Express Polling. Configuration state if any one lane of the interconnect successfully completes the transmitting and receiving training sequence requirements in PCI Express Polling.Active state.
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Intel Corporation
Kerveros James C
Reynolds Derek J.
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