Propagation test strobe circuitry with boundary scan circuitry

Details Propagation test strobe circuitry with boundary scan circuitry Propagation test strobe circuitry with boundary scan circuitry

2009-01-09

2010-02-02

Tu, Christine T (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07657808

ABSTRACT:
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry, including gating producing a Capture Test Strobe (CTS) signal, and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure.

REFERENCES:
patent: 5862152 (1999-01-01), Handly et al.
patent: 5978902 (1999-11-01), Mann
patent: 6158034 (2000-12-01), Ramamurthy et al.
patent: 6286119 (2001-09-01), Wu et al.

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