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Digital process monitor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital random noise generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital reliability monitor having autonomic repair and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital signal processing for real time classification of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital signal processor including an interface therein...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital signal processor with halt state checking during...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital signature generation for hardware functional test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital storage element with enable signal gating

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital system and method for testing analogue and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Digital-to-analog conversion with an interleaved,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Direct access logic testing in integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed interface for parallel testing of multiple...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed interface for parallel testing of multiple...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed midlet testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed test architecture for multiport RAMs or other...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed test compression for integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Distributed test control architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Divided scan path with decode logic receiving select control...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Domino scan architecture and domino scan flip-flop for the testi

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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DRAM stacked package, DIMM, and semiconductor manufacturing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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