Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-06-21
2005-06-21
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C341S173000
Reexamination Certificate
active
06910165
ABSTRACT:
A system and method for generating random noise for use in testing electronic devices comprises a first random pattern generator circuit for generating first sets of random bit pattern signals; one or more delay devices each receiving a trigger input signal and a random bit pattern signal set for generating in response a respective delay output signal, each delay output signal being delayed in time with respect to a respective trigger signal, a delay time being determined by the bit pattern set received; and, an oscillator circuit device associated with a respective one or more delay devices for receiving a respective delay output signal therefrom and generating a respective oscillating signal, each oscillator signal generated being used to generate artificial random noise for emulating a real noise environment in an electronic device. A second random pattern generator circuit may be provided for generating second sets of random bit pattern signals for receipt by each of the associated oscillator circuit devices in order to frequency adjust in a random manner, each of the oscillator signals.
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Chen Howard H.
Dhong Sang H.
Hsu Louis L.
Lo Tin-chee
Wang Li-Kong
Karra, Esq. Satheesh K.
Lamarre Guy J.
Scully Scott Murphy & Presser
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