Digital storage element with enable signal gating

Details Digital storage element with enable signal gating Digital storage element with enable signal gating

2005-06-30

2009-02-03

Tu, Christine T (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07487417

ABSTRACT:
A digital storage element (e.g., a flip-flop or a latch) comprise a master transparent latch that receives functional data from a data input port and scan data from a scan input port and a slave transparent latch coupled to the master transparent latch. The slave transparent latch comprises dedicated functional data and scan data output ports. A clock gating element is also included that gates off a clock to the slave latch, and not the master transparent latch, based on an enable signal that is asserted to disable use of the digital storage element.

REFERENCES:
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patent: 5784384 (1998-07-01), Maeno
patent: 5812561 (1998-09-01), Giles et al.
patent: 6237122 (2001-05-01), Maki
patent: 2004/0075479 (2004-04-01), Gupta
patent: 2005/0091562 (2005-04-01), Krishnamoorthy et al.
patent: 2006/0085707 (2006-04-01), Khan et al.

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