Digital-to-analog conversion with an interleaved,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

11073682

ABSTRACT:
The invention relates to a method and a circuit for digital-to-analog conversion, in which an interleaved pulse-width modulation signal (VPWM) is low-pass-filtered.

REFERENCES:
patent: 4095218 (1978-06-01), Crouse
patent: 5019819 (1991-05-01), Kimura
patent: 5774084 (1998-06-01), Brombaugh et al.
patent: 6181266 (2001-01-01), Toki
patent: 6538484 (2003-03-01), Rappaport et al.
patent: 6606046 (2003-08-01), Kanno
patent: 6970503 (2005-11-01), Kalb
patent: 7061417 (2006-06-01), Chin
patent: 0 932 257 (1999-07-01), None
patent: 2 288 932 (1995-11-01), None
“Digital-to-Analog Conversion by Pulse-Count Modulation Methods,” Christian Halper et al.,IEEE Transactions on Instrumentation and Measurments, vol. 45, No. 4, Aug. 1996, pp. 805-813.
Search Report from European Patent Office (for related foreign patent application) referencing the above-listed documents, dated Jun. 27, 2005 (3 pages total).

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