Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-03-27
2007-03-27
Ton, David (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C341S155000
Reexamination Certificate
active
11073682
ABSTRACT:
The invention relates to a method and a circuit for digital-to-analog conversion, in which an interleaved pulse-width modulation signal (VPWM) is low-pass-filtered.
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“Digital-to-Analog Conversion by Pulse-Count Modulation Methods,” Christian Halper et al.,IEEE Transactions on Instrumentation and Measurments, vol. 45, No. 4, Aug. 1996, pp. 805-813.
Search Report from European Patent Office (for related foreign patent application) referencing the above-listed documents, dated Jun. 27, 2005 (3 pages total).
Fitch Even Tabin & Flannery
Patent-Treuhand-Gesellschaft fur Elektrisch Gluhlampen mbH
Ton David
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