Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-06-21
2011-06-21
Baderman, Scott T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07966537
ABSTRACT:
A circuit for preventing failure in an integrated circuit. The circuit including: an original circuit; one or more redundant circuits; and a repair processor, including a clock cycle counter configured to count pulses of a pulsed signal, the repair processor configured to (a) replace the original circuit with a first redundant circuit or (b) configured to select another redundant circuit, the selection in sequence from a second redundant circuit to a last redundant circuit, and to replace a previously selected redundant circuit with the selected redundant circuit each time the cycle counter reaches a predetermined count of a set of pre-determined cycle counts.
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Bonaccio Anthony R.
LeStrange Michael
Tonti William R.
Ventrone Sebastian T.
Ahmed Enam
Baderman Scott T
Cain David
International Business Machines - Corporation
Schmeiser, Olsen & Watt
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