Divided scan path with decode logic receiving select control...

Details Divided scan path with decode logic receiving select control... Divided scan path with decode logic receiving select control...

2001-11-29

2004-07-20

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000

Reexamination Certificate

active

06766487

ABSTRACT:

PRIOR ART DESCRIPTION
This disclosure relates to and incorporates by reference patent application Ser. No. 09/803,599, filed Mar. 9, 2001, Adapting Low Power Scan Architectures for Low Power Operation.


REFERENCES:
patent: 6073254 (2000-06-01), Whetsel
patent: 6418545 (2002-07-01), Adusumilli
patent: 63198884 (1988-08-01), None

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