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Clocking methodology for at-speed testing of scan circuits...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Clustering-based approach for coverage-directed test generation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinational test pattern generation method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinational test pattern generation method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinatorial at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinatorial at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Command multiplier for built-in-self-test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Common test logic for multiple operation modes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communicating simultaneously a functional signal and a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication element and communication apparatus using the...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication equipment with boundary scan elements

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication interface for diagnostic circuits of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication interface for diagnostic circuits of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication signal testing with a programmable logic device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication signal testing with a programmable logic device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication system with boundary scan elements

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communication system, a synchronization circuit, a method of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Communications jacks including test circuits and related...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Compacting circuit responses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Compacting circuit responses

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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