Communication interface for diagnostic circuits of an...

Details Communication interface for diagnostic circuits of an... Communication interface for diagnostic circuits of an...

2007-03-27

2007-03-27

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10417330

ABSTRACT:
An integrated circuit including diagnostic circuitry having serial scan chains or debug bus access circuits for establishing communication using an interface circuit coupled with a bi-directional serial link to an external diagnostic device. The bi-directional serial link carries both data and control signals. The serial protocol provides for a pacing signal for indicating to the external diagnostic device when it is ready to receive more data and/or when it has completed a particular diagnostic operation. This provides a self-pacing ability. A training signal generated by the external diagnostic device is detected by the interface circuit on initialization and used to derive sampling point timings.

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patent: 6041406 (2000-03-01), Mann
patent: 6134481 (2000-10-01), Warren
patent: 6968472 (2005-11-01), Fernald
patent: 0 840 219 (1998-05-01), None
patent: 1 213 657 (2002-06-01), None

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