Search
Selected: All

Determining edge relationship between clock signals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Determining the health of a desired node in a multi-level...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Determining timing associated with an input or output of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Deterministic bist architecture including MISR filter

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Deterministic BIST architecture tolerant of uncertain scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Deterministic hardware reset for FRC machine

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Deterministic random LBIST

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Deterministic testing of edge-triggered logic

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for configuring input/output pads

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for creating a signature

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for JTAG test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for testing a device through resolution of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for testing a semiconductor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for testing integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device and method for testing integrated circuit dice in an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device for and method of coupling test signals to a device...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device for controlling conformity of consumption of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device for controlling pivoting elements

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device for implementing hierarchical state charts and methods an

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Device for indicating the fixability of a logic circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.