Device and method for configuring input/output pads

Details Device and method for configuring input/output pads Device and method for configuring input/output pads

2005-11-02

2010-11-16

Chen, Alan (Department: 2182)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C710S008000, C710S036000

Reexamination Certificate

active

07836369

ABSTRACT:
A method for configuring IO pads, the method includes determining a current configuration of multiple IO pads of an integrated circuit and whereas the method is characterized by generating multiple boundary scan register words that comprise Configuration information; and repeating the stage of serially writing a certain boundary scan register word to a boundary scan register and outputting the boundary scan register word to multiple IO pad control circuits. A device that includes a core, connected to a boundary scan register, a TAP controller and multiple IO pad circuits, the device is characterized by including a control circuit adapted to determine a current configuration of the IO pads, to generate multiple boundary scan register words that comprise configuration information; and to control a repetition of: writing a certain boundary scan register word to the boundary scan register and outputting the boundary scan register word to multiple IO pad control circuits.

REFERENCES:
patent: 5847561 (1998-12-01), Whetsel
patent: 6219812 (2001-04-01), Golshan
patent: 6851079 (2005-02-01), Hergott
patent: 2003/0115555 (2003-06-01), Wissel
patent: 2004/0117698 (2004-06-01), Tran et al.
IEEE Standard 1149.1-2001 (R2008); “IEEE Standard Test Access Port and Boundary-Scan Architecture”.
DeHon et al; “Automatic Impedance Control”; ISSCC 93, Sesion 10, High-Speed Communication and Interfaces, Paper 10.7.

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