TAP sampling at double rate

Details TAP sampling at double rate TAP sampling at double rate

2010-01-25

2011-10-25

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C365S201000, C324S765010

Reexamination Certificate

active

08046647

ABSTRACT:
An integrated circuit comprising: at least one test input for receiving test data; test control circuitry between the at least one test input and circuitry to be tested; wherein the test data is clocked in on a rising clock edge and a falling clock edge.

REFERENCES:
patent: 5459736 (1995-10-01), Nakamura
patent: 5627841 (1997-05-01), Nakamura
patent: 5646567 (1997-07-01), Felix
patent: 6374370 (2002-04-01), Bockhaus et al.
patent: 6397354 (2002-05-01), Ertekin
patent: 7149927 (2006-12-01), Stancil
patent: 2002/0099999 (2002-07-01), Wagner et al.
patent: 2003/0009715 (2003-01-01), Ricchetti et al.
patent: 2003/0068000 (2003-04-01), Warren
patent: 2003/0101376 (2003-05-01), Sanghani
patent: 2004/0006729 (2004-01-01), Pendurkar
patent: 2005/0034039 (2005-02-01), Prasadh et al.
patent: 2005/0240850 (2005-10-01), Ohwada et al.
patent: 2005/0257108 (2005-11-01), Grupp et al.
European Search Report dated Jun. 2, 2004 in connection with European Patent Application No. 03 25 7953.

Affiliated with

Also associated with

Rating

TAP sampling at double rate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with TAP sampling at double rate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and TAP sampling at double rate will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4293720