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Enhancing speed of simulation of an IC design while testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Entering a shift-DR state in one of star connected components

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error catch RAM support using fan-out/fan-in matrix

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error correction code circuit that performs built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error detecting circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error detecting circuit for detecting the location of error

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error detection in an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error detection on programmable logic resources

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Error reduction in semiconductor processes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Estimation of failure section region with small simulation calcu

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Evaluation circuit and method for detecting and/or locating...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Evaluation device of weighted fault coverage and evaluation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Evaluation of interconnect reliability using propagation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event based fault diagnosis

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event based semiconductor test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event based test method for debugging timing related...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event based test system storing pin calibration data in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event phase modulator for integrated circuit tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event processing apparatus and method for high speed event...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Event tester architecture for mixed signal testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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