Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-09-06
2005-09-06
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S048000
Reexamination Certificate
active
06941496
ABSTRACT:
An error detecting circuit for detecting the location of an error is provided. The error detecting circuit has an error data storing unit and an error data collecting unit. The error data storing unit divides a circuit having areas, and outputs a plurality of error signals in response to a plurality of state error signals, a serial chain signal, a lock-enable signal, and a chip error signal, which are enabled when an error occurs in the corresponding area. The serial chain signal reads the plurality of state error signals if the chip goes out of order when an error occurs in the circuit. The lock-enable signal determines whether or not to preserve the plurality of state error signals. In response to the serial chain signal, the error data storing unit enables a confirmation of at least one state error signals stored in the error data storing unit.
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De'cady Albert
F.Chau & Associates LLC
Samsung Electronics Co,. Ltd.
Trimmings John P.
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