Error correction code circuit that performs built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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714738, 714 30, G06F 1127

Patent

active

059251441

ABSTRACT:
An integrated circuit includes an ECC encoder having a normal mode of operation and a test mode of operation. During the test mode, the encoder is operated as a test pattern generator for computing a test pattern that exhaustively stimulates data paths, memory structures and other logic functions on the integrated circuit. A signature of responses to the test pattern can then be computed and compared to a known "correct" signature to determine whether timing faults and other types of faults exist in the integrated circuit. A disk controller chip based on such an integrated circuit can, in addition to testing its own on-chip data paths, memory structures and other logic functions, supply a test pattern to a read/write channel chip and other components on a printed circuit board assembly of a disk drive.

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patent: 5319599 (1994-06-01), Kato
patent: 5359468 (1994-10-01), Rhodes et al.
patent: 5515383 (1996-05-01), Katoozi
patent: 5640286 (1997-06-01), Acosta et al.
patent: 5719884 (1998-02-01), Roth et al.

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