Event based fault diagnosis

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S724000

Reexamination Certificate

active

06324665

ABSTRACT:

TECHNICAL FIELD
The present invention relates to fault diagnosis. More particularly, the invention relates to fault diagnosis of electronic circuits or devices utilizing observations of events occurring on the circuits or devices.
BACKGROUND OF THE INVENTION
Functional or operational testing of electronic circuits, printed circuit boards (PCB), devices, and products is well known in the art. Many electronic manufacturing test stations test functional characteristics of electronic equipment. When a device under test (DUT) fails, manufacturers want to repair the device to avoid scrap waste and to maintain production efficiency. However, there is often only a weak relationship between a failure diagnosed by functional testing and the root cause of the failure. Therefore, it is often difficult or impossible to glean repair insight from a functional testing failure.
Current repair practices rely on expert technicians to perform non-obvious repairs based on extra measurements and/or knowledge of the circuit, PCB, device, or product. This approach can be difficult and time consuming. Sometimes the required time investment exceeds the value of the device being repaired, so that scrapping the device is the prudent thing to do. This process can be inefficient and costly for manufacturers.
Most prior art approaches to fault diagnosis are ad hoc. Some manufacturers depend upon technicians to learn a failure-to-fault mapping over time as they gain experience repairing the circuit, PCB, device, or product. This approach suffers from the disadvantages listed above. Also, this approach suffers from the additional disadvantage that the expert repair knowledge stays with the experienced repair technician. Other repair technicians have difficulty gaining the same knowledge.
Another prior art approach is to have a person developing the tests create a failure-cause mapping that can be used by a repair technician. Preparation of such documentation is time consuming and the results are often inaccurate, because it is difficult, if not impossible, to think of all possible causes for a given failure.
Another prior art approach utilizes artificial intelligence diagnostic software to deduce failure causes. Examples of such software are AITEST (TM) and FAULT DETECTIVE (TM), the latter being a product of Hewlett-Packard. Both software packages require creation of a model of the DUT at a logical or electrical level and additional testing information to map failures to device faults. While artificial intelligence diagnostic software is a valuable diagnostic tool, the required models are cumbersome to create, error prone, and difficult to debug.
Another prior art approach utilizes statistics from repairs to develop failure-to-fault mappings in software. This approach is, again, time consuming and requires a repair technician to accurately perform manual data entry that informs the software what got fixed for particular failures.
For purely digital DUTs, there are well known backtracing algorithms that allow backtracing to the source of failures. These algorithms exploit knowledge about how the digital signals should appear on particular signal nodes of the DUT. These algorithms usually require a complicated simulation model of the DUT to develop the stimulus digital signals and calculate the response digital signals for the DUT. Creating a functional test from these digital patterns is difficult, and the technique cannot be applied to more general circuits involving non-digital signals. Furthermore, simulation models usually assume stuck-at faults, which may not cover the full spectrum of faults, even for digital signals.
Another prior art technique is digital signal analysis. This technique is used, for example, by the HP 3060 (TM) test system, a product of Hewlett-Packard. With this technique, a binary digital signal from a DUT is fed into a synchronous linear feedback shift register, which calculates a checksum value for the signal. If the checksum differs from a known good value, a fault is detected. Digital signal analysis can only be utilized where the sampling clocks of the DUT and linear feedback shift register are the same or synchronized. Digital signal analysis is not applicable to analog signals.
SUMMARY OF INVENTION
The event stream fault diagnosis (ESFD) instrument of the present invention is an instrument that monitors or observes important signals of a DUT when attached to a test station. For each observed signal, the instrument extracts significant events occurring on that signal. For example, the ESFD instrument can capture state transition times (0 to 1 or 1 to 0) for a digital signal. For other types of signals, different event data may be observed (e.g., maximum voltage inflection time). In any case, the event data is information about the event and the time at which it occurred or the order of its occurrence relative to other events. The present invention is not limited to digital signals or other specific types of signals, but can be used on any signal, even non-electrical signals, that can be measured over time.
Recorded events at a particular observation node can be compiled into an event list or event stream. The combination of all event streams for all signals observed on a DUT constitutes a record of the performance of the DUT during a test. By recording or constructing these event streams for a known good DUT, a record of correct, known good events can be created. The event stream of a potentially faulty DUT then can be time aligned with and compared to a known good event stream to determine which signals, in any, of the potentially faulty DUT are in error. This comparison can be done by the ESFD instrument automatically.
The present invention can backtrace through event lists to signal nodes upstream iii the circuit to find the first signal node exhibiting a problem. This backtracing involves the ESFD instrument guiding manual or automatic probing of particular signal nodes to find the primary or most upstream failing signal node. Guiding may be based on component connection information and an input/output pin model for each component on the DUT. At each signal node backtraced, the correct event stream for that node can be compared to the observed event stream to decide if the signal node is part of the fault. The key principle of backtracing is to search for the first discrepancy in time from the correct event stream for a signal. The earliest incorrect event in time indicates a primary failing signal node.
Once the primary faulty signal node or nodes have been found, the ESFD instrument can report the nodes and all component pins that affect those nodes. This information can help a repair technician quickly localize repair efforts on the pins and components most likely to be the cause of the test failure of the DUT.
As failures and repairs are done on a particular DUT type, the ESFD instrument can learn specific failure causes related to particular incorrect event streams, and in this way, provide even more accurate diagnosis information to speed repair.
In a preferred embodiment, the ESFD instrument of the present invention comprises several event measurement channels, a controller, memory for storing event information, and a display. Each event measurement channel receives a signal from an observation node of a DUT and measures digital or analog qualities of the signal. The measurement channels may be logic analyzer channels and the measurements may be implemented using digital signal processing (DSP) algorithms.
When considered against the backdrop of the prior art, the present invention provides better fault diagnostics to help a repair person find and fix device defects faster, reducing the cost and increasing the effectiveness of repair.
More specifically, the fault diagnosis instrument and method of the present invention have the following advantages over prior techniques: (1) the present invention is capable of extracting a manageable amount of meaningful data from large amounts of raw test data; (2) the present invention can be added to nearly any existing test stati

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