Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-03-20
2007-03-20
Kerveros, James C (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S700000
Reexamination Certificate
active
10412078
ABSTRACT:
A test method for debugging failures of an IC device with use of an event based semiconductor test system is capable of distinguishing a timing related failure from other failures. The test method includes the steps of: applying a test signal to a DUT and evaluating a response output of the DUT, detecting a failure in the response output, identifying a reference clock signal related to the failure, identifying a portion of the reference clock signal that is directly related to the failure, and incrementally changing a timing of events for the identified portion of the reference clock signal to detect change in the response output from the DUT.
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Pramanick Ankan
Rajsuman Rochit
Sawe Siddharth
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