Error detecting circuit

Details Error detecting circuit Error detecting circuit

2007-03-06

2007-03-06

Tu, Christine T. (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S731000

Reexamination Certificate

active

10882523

ABSTRACT:
In one embodiment, an apparatus includes a datapath circuit to generate a data output signal in response to a data input signal and at least a first data clock signal; a shadow circuit, coupled to the datapath circuit, to generate a shadow output signal in response the data input signal and at least a second data clock signal during a functional mode of operation and to generate a scan-out signal in response to a scan-in signal and at least a first test clock signal during a test mode of operation; and an error detect circuit, coupled to the datapath and the shadow circuits, to generate an error signal in response to a mismatch between the data output signal and the shadow output signal.

REFERENCES:
patent: 6023778 (2000-02-01), Li
patent: 6029261 (2000-02-01), Hartmann
patent: 6708284 (2004-03-01), Smith
patent: 6735731 (2004-05-01), Ewen et al.
patent: 2003/0046643 (2003-03-01), Ohta
patent: 2003/0222677 (2003-12-01), Komaki
patent: 2004/0041610 (2004-03-01), Kundu
patent: 2004/0243893 (2004-12-01), Mudge et al.

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