Validating test signal connections within an integrated circuit

Details Validating test signal connections within an integrated circuit Validating test signal connections within an integrated circuit

2006-08-01

2006-08-01

Decady, Albert (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07085978

ABSTRACT:
Testing of the test signal connections to a functional block of circuitry within an integrated circuit is made using wrapper serial scan chain cells of a wrapper serial scan chain. These wrapper cells can then be used to validate that the correct signals are reaching test signal inputs and the correct signals are reaching their destination from test signal outputs when that functional block of circuitry is incorporated within a larger design, e.g., a system-on-chip design.

REFERENCES:
patent: 6446230 (2002-09-01), Chung
patent: 6560740 (2003-05-01), Zuraski et al.

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